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POWER MANAGEMENT Description
The SC251 is a synchronous step-down converter designed for use as an adaptive voltage supply for WCDMA RF power amplifiers (PAs). An analog control input is used to adjust the output voltage dynamically between 0.5V and 3.4V using a non-linear transfer function. The non-linear relationship maximizes total system efficiency by providing the PA with the minimum voltage it needs to maintain linearity. For output voltages greater than 3.4V the input is connected directly to the output via an internal PMOS switch. An optional gate drive (GD) output to control an external low on-resistance PMOS switch is also provided for systems applications that require minimal voltage drop. The SC251 also provides a 2.85V LDO reference output that can be used to supply a PA bias input. Low power and high power modes are provided to match performance with dual mode PAs. In low power mode the output voltage follows an exponential relationship with the VDAC input until it reaches 3.4V. When the VMODE pin changes state, VOUT follows an alternate exponential relationship. The SC251 is capable of supplying output current up to 800mA. Standby current is <1A when the device is disabled. The internal clock runs at 1MHz so that small surface mount inductors and capacitors can be used.
Step-down DC-DC Converter with Bias LDO for WCDMA Amplifiers
Features
VOUT exponentially proportional to VDAC for maximum efficiency (patent pending) Output range and pass-through mode - 0.5V to 3.4V Output current - 800mA Shutdown current - < 1A LDO PA bias supply - 2.85V, 10mA Internal clock - 1MHz Continuous short circuit protection on VOUT Duty cycle mode - 100% Internal PMOS bypass transistor Gate drive available for external bypass transistor Over 90% efficiency Low and high power modes for optimum dual-mode PA efficiency Switching time (lowest to highest output) < 40s Micro-lead frame package MLPD-10, 3mm x 3mm
SC251
Applications
3G mobile phones - RF PA power supply WCDMA power amplifier modules Wireless modems
Typical Application Circuit
Patent Pending
Optional External Pass-through MOSFET
VIN 2.7 to 5V
1
CIN 10F
GD VIN LX VOUT EN
3 10 8
L1 4.7H VOUT 0.5V to VIN COUT 4.7F RF Input BIAS CREF 1F Vcc
SC251
4 5 VMODE 6 VDAC 9
PGND
ENABLE VMODE VDAC
PA
GND
RF Output
VREF GND
2 7
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SC251
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device or device malfunction. Operation outside of the parameters specifed in the Electrical Characteristics section is not recommended.
Parameter Input Supply Voltage Logic Inputs/Outputs (EN, VMODE, VDAC, GD) Output Voltage LX Voltage Thermal Impedance Junction to Ambient(1) VOUT Short-Circuit to GND Operating Ambient Temperature Range Storage Temperature Maximum Junction Temperature Peak IR Reflow Temperature ESD Protection Level(2)
Symbol VIN VN VOUT VLX JA tSC TA TS TJ TLEAD VESD
Maximum -0.3 to 7 -0.3 to VIN +0.3 ,7V Max -0.3 to VIN +0.3 ,7V Max -1 to VIN +1, 7V Max 49 Continuous -40 to +85 -60 to +160 -40 to +150 260 2
Units V V V V C/W s C C C C kV
Notes: 1. Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under exposed pad pre JESD51 standards. 2. Tested according JEDEC standard JESD22-A114-B
Electrical Characteristics
Unless otherwise noted: VIN = 4V, EN = VIN, VMODE = GND (High Power), VDAC = 1.1V, TA = -40 to 85C. Typical values are at TA = +25C.
Parameter Input Voltage Range
Symbol VIN
Conditions
Min 2.7
Typ
Max 5
Units V
VDAC = 0.3V, VMODE = VIN, IOUT = 20mA VOUT Accuracy VOUT VMODE = VIN, IOUT = 60mA IOUT = 200mA Line Regulation Load Regulation (PWM) Peak Inductor Current Bypass FET current limit VOUT LINE VOUT LOAD ILX PK IPASS IQ NORM IQ PASS (c) 2006 Semtech Corp. VDAC = 1.3V 2 VIN = 2.7V to 5V, IOUT = 200mA, TA = -40 to 85C IOUT = 0A to 800mA, TA = -40 to 85C
0.44 3.16 1.38
0.48 3.40 1.62 1.2 0.5
0.52 3.64 1.86 % % 1.7 2.5 A A V
1 1 2.5
Quiescent Current
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SC251
POWER MANAGEMENT Electrical Characteristics (Cont.)
Parameter Shutdown Current P-Channel Current Limit VDAC Pass-through Mode Threshold VDAC Pass-through Mode Hysteresis VREF Output VREF LDO Dropout VREF Load Current VREF Load Regulation VREF Line Regulation GD Load Capacitance Symbol ISD ILIM(P) VDAC rising VDAC falling VDAC HYST VREF VREF DO IREF VREF LDREG VREF LNREG CGD IREF = 0.1mA to 10mA IREF = 1 mA 10 TA = 25C VDAC = 1.4V, TA = 25C VIN = 3V, IOUT = 100mA VIN = 3V, IOUT = 100mA IOUT = 600mA, VIN = 3V, VDAC = 1.4V EN=GND, VIN = 3.6V, LX = GND EN=GND, VIN = 3.6V, VOUT = GND VDAC > 0.95V VDAC < 0.95V EN / VMODE increasing EN / VMODE decreasing EN / VMODE = 5.0V EN / VMODE = 0V 0.85 0.65 1.6 0.6 2 2 20 IREF = 10mA IREF = 10mA 2.75 Conditions EN = GND 0.9 1.24 1.2 Min Typ 0.1 1.3 1.28 1.245 40 2.85 2.95 100 10 0.05 0.3 mV V mV mA %/mA %/V nF 2 150 mA mA A 3 1.15 MHz 1.15 V V A A % A Max 3 1.7 1.32 V Units A A
VDAC PASS
GD Source Current
GD Sink Current RDSon of P-Channel FET RDSon of N-Channel FET RDSon of Bypass P-Channel FET LX Pin PMOS Leakage VOUT Pin Bypass FET Leakage Oscillator Frequency
IGDH
IGDL RPFET RNFET RPASS ILLXP ILVOUT
0.5
75 0.4 0.25 0.2 0.1 0.1 1
fOSC VIH VIL IIH IIL OSEN
Logic Input High Logic Input Low Logic Input Current High Logic Input Current Low Enable Transient Over/ Undershoot (1) (c) 2006 Semtech Corp.
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SC251
POWER MANAGEMENT Electrical Characteristics (Cont.)
Parameter Enable Transient Settling Time (1) VDAC Transient Over/Undershoot (1) VDAC Transient Settling Time (1) Pass-Through Transition Over/Undershoot (1) Pass-Through Transition Settling Time (1) Thermal Shutdown Thermal Shutdown Hysteresis
Notes: 1) Not tested - guaranteed by design.
Symbol tEN-ST OSVDAC tVDAC-ST OSPASS tPASS-ST TSD TSDH
Conditions
Min
Typ
Max 40 20 40 20 40
Units s % s % s C C
160 15
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SC251
POWER MANAGEMENT Pin Configuration Pin Configuration Ordering Information
DEVICE SC251MLTRT (1) (2)
VIN VREF GD EN VMODE
1 2 3 4 5 T 10
PACKAGE MLP 3x3-10 Evaluation Board
LX PGND VOUT GND VDAC
TOP VIEW
SC251EVB
9 8 7 6
Notes: 1) Lead-free packaging only. This product is fully WEEE and RoHS compliant. 2) Available in tape and reel only. A reel contains 3000 devices.
MLPD10: 3X3 10 LEAD
Marking Information
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SC251
POWER MANAGEMENT Block Diagram
VOUT
3
8
GD
SENSE Current Sense
1
VIN References
LX
10
2 VREF
Control Logic PGND 9 PWM Comparator
GND 7
4
EN
PWL Transfer VMODE Function 5 Generator
6 VDAC
SENSE
Error Amp.
Oscillator
Slope Generator
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SC251
POWER MANAGEMENT Pin Description
Pin# 1 2 Pin Name VIN VREF Pin Function Input supply pin. A 2.85V LDO reference voltage supply - 10mA max load that can be used as a supply for power amplifier bias inputs. A push pull external PFET Gate drive control output - connect to the gate of an external MOSFET to control a low resistance path between VIN and VOUT when low voltage drop is needed (optional - if not used leave floating). A low state turns on the MOSFET. Enable pin - controls both the switching converter and the VREF output. Active high. Input control to select the VDAC to VOUT profile (high = low power, low = high power). Analog control voltage input - ranges between 0.3 and 1.2V for exponential control of VOUT , VDAC > 1.28 enables pass-through mode (using internal pass MOSFET or optional low RDSON MOSFET controlled by GD). System and logic ground. Output voltage pin. Ground reference for internal N-channel MOSFET. Switch node connection to inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. Pad for heatsinking purposes. Connect to ground plane using multiple vias. Not connected internally.
3 4 5 6 7 8 9 10 T
GD EN VMODE VDAC GND VOUT PGND LX Thermal Pad
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SC251
POWER MANAGEMENT Applications Information
SC251 Detailed Description The SC251 is a step-down, fixed frequency pulse-width modulated DC-DC converter designed for use with RF power amplifiers (PAs) in WCDMA handsets and modules. The output is used to supply DC power to the PA rather than connecting the DC input pin directly to the battery supply. A substantial system power efficiency improvement can be achieved by allowing the system controller to adaptively adjust the DC voltage to the PA, reducing the total power consumption of the device. To maximize efficiency at all RF output gain settings, the PA supply voltage is adjusted exponentially, minimizing PA supply headroom and losses. The benefit of having an exponential VOUT vs. VDAC relationship is clearly seen when plotted on the same graph as linear relationships, see following figure. The SC251 VOUT vs. VDAC transfer function is optimized to provide the lowest supply voltage to maintain the PA's linearity. This provides the best possible balance between Adjacent Channel Leakage Ratio (ACLR) margin and efficiency requirements. By using a switching regulator, less current is needed than when the PA is connected directly to the battery or an LDO. Reduced current consumption results in more talk-time for the handset. Operation Modes The SC251 output voltage is dependent on the VDAC analog control voltage and the VMODE digital control input. In each mode VOUT follows a different VDAC transfer function that is designed to produce maximum power amplifier efficiency. When VMODE is high the device is in low power mode, and when VMODE is low the device switches to high power mode. The relationships between VOUT and VDAC in both modes are optimized to achieve the best efficiency from a dual-mode PA design These relationships are shown in the following figure. The system controller determines the output power level needed from the PA and adjusts the VDAC voltage accordingly. The SC251 monitors the VDAC voltage and adjusts the output voltage supply to the PA to optimize efficiency and maintain PA linearity.
VIN - Vdropout
VOUT(V)
LOW POWER MODE
HIGH POWER MODE
VOUT (V) , Amplitude (V)
Margin to maintain PA linear operation Exponential function advantage over linear function
VDAC(V)
Figure 2 - VDAC to VOUT Transfer Functions
Signal amplitude (V)
VDAC(V)
Figure 1 - Advantage of exponential Transfer Function
Low Power Mode The SC251 enters low power mode when the VMODE pin is pulled high. In this mode the VDAC to VOUT transfer function is set to follow the dotted line curve shown in Figure 2. The output voltage starts at 0.5V for low power settings and increases exponentially until it reaches the maximum of 3.4V. If the power control for the PA requires the output voltage to exceed 3.4V, then the SC251 goes into passthrough mode and VOUT is equal to VIN minus the voltage dropped across the pass-through device (see pass-through mode for more details). A typical WCDMA load profile for low power mode, with the minimum and maximum current limits, is shown in Figure 3.
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SC251
POWER MANAGEMENT Applications Information (Cont.)
In high power mode the PA gain is constant, but output impedance is lower and the subsequent input voltage required to achieve the desired output power is less than in low power mode. The SC251 output, therefore, switches to the solid line curve in the VDAC-to- VOUT in Figure 2. The lower output voltage required improves efficiency over a single mode system by lowering the voltage required for a fixed current load. 100% Duty Cycle Operation When the input supply voltage approaches the programmed output voltage the PMOS on-time extends until the supply voltage gets within 400mV of the output voltage. At this point both the internal pass device and the PMOS switching device automatically turns on, connecting VIN to VOUT. The bypass device and PMOS switching device remains fully on until either the VIN voltage is increased by 150mV or the programmed VOUT voltage is reduced such that VIN - VOUT is greater than 650mV. Bypassing the impedance of the inductor and switching PMOS device improves efficiency by minimizing the voltage drop from VOUT to VIN. Pass-Through Mode This mode is entered when the VDAC voltage reaches 1.28V. If the demanded output voltage is within 400mV of the input voltage the device automatically enters pass-through as this exceeds the maximum controlled duty cycle of the power converter. In pass-through mode the device enables an internal P-channel MOSFET that bypasses the converter, connecting the output directly to the input. The RDSon of this FET is extremely low so there is little voltage drop across the part. If the system designer determines that the pass-through resistance is too high for the application, there is an optional gate-drive output that can be used with an external switch. The GD pin becomes active-low only when VDAC is greater than 1.4V. This pin can be connected to the gate of an external low-RDSon P-channel MOSFET whose source and drain are connected to VIN and VOUT, respectively. This option allows the lowest insertion loss possible between VIN and VOUT . Note that GD should not be loaded with a DC current. GD is monitored so that the part remains in passthrough until GD reaches within 600mV of VIN. Bias Supply Output In addition to the main output the SC251 also provides a low current LDO reference output that can be used as a
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Maximum Load
Typical Load
IOUT(mA)
Minimum Load
VOUT(V)
Figure 3 - Load Profile-Low Power Mode
Maximum Load
Typical Load
IOUT(mA)
Minimum Load
VOUT(V)
Figure 4 - Load Profile-High Power Mode High Power Mode The SC251 enters high power mode when the VMODE pin is pulled low. In this mode the VDAC to VOUT transfer function is set to follow the solid line curve shown in Figure 2. The output voltage again starts at 0.5V and increases exponentially as the power demand increases until it reaches the maximum of 3.4V. A typical WCDMA load profile for high power mode with the minimum and maximum current limits is shown in Figure 4. If the power control for the PA requires the output voltage to exceed 3.4V, then the SC251 goes into pass-through mode and VOUT is equal to VIN minus the voltage dropped across the pass-through device (Vdropout).
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SC251
POWER MANAGEMENT Applications Information (Cont.)
bias supply for power amplifiers. This output provides a regulated 2.85V with output current capability up to 10mA. The 2.85V output is guaranteed for input supply voltages Applications Information (Cont.) in excess of 2.95V. When input voltages below 2.95V are used, VREF is equal to VIN - VREF DO. This reference supply is controlled by the same enable pin as the switching regulator. Protection Features The SC251 provides the following protection features: * Thermal shutdown * Current limit * Under voltage lockout Thermal Shutdown The device has a thermal shutdown feature to protect the device if the junction temperature exceeds 160C. In thermal shutdown the on-chip power devices are disabled, effectively tri-stating the LX output. Switching will resume when the temperature drops by 15C. Short Circuit Protection The PMOS and NMOS power devices of the buck switcher stage are protected by current limit functions. In the event of a short to ground on the output, the LX pin will switch with minimum duty cycle. The duty cycle is short enough to allow the inductor to discharge during each cycle, thereby preventing the inductor current from "staircasing". The pass-through PMOS is protected by a current limit function. When the part is enabled in pass-through, the output capacitor charges up with a large surge current. In order to support this surge current and to protect against short circuits, an internal timer is used. A short circuit condition must exist for more than 128 clock cycles before the pass-through device is disabled. After an additional 2048 clock cycles, the pass-through device will turn back on. This cycle will continue until the short circuit is removed. This method allows the part to manage thermal dissipation and recover when the fault condition is removed. Under Voltage Lockout The part will turn itself off if the input supply voltage falls below 2.4V typical. The device is allowed to turn on again when the input supply voltage increases above the lockout voltage. Hysteresis is included to prevent chattering. Inductor Selection The SC251 is designed for use with a 4.7H inductor. The magnitude of the inductor current ripple is dependent on the inductor value and can be determined by the following equation:
VOUT VOUT 1 - VI N IL = L x fOSC
The inductor should have a low DC Resistance (DCR) to minimize the conduction losses and maximize efficiency. As a minimum requirement, the DC current rating of the inductor should be equal to the maximum load current plus half of the inductor current ripple as shown by the following equation: IL ILPK = IOUT (MAX ) + 2 Final inductor selection will depend on various design considerations such as efficiency, EMI, size and cost. Table 1 lists the manufacturers of practical inductor options. CIN Selection The source input current to a buck converter is noncontinuous. To prevent large input voltage ripple a low ESR ceramic capacitor is required. A minimum value of 10F should be used for sufficient input voltage filtering and a 22F should be used for improved input voltage filtering. COUT Selection The internal compensation is designed to work with a certain output filter corner frequency defined by the equation: 1 fC = 2 L x COUT This single pole filter is designed to operate with an output capacitor value of 4.7F. Output voltage ripple is a combination of the voltage ripple from the inductor current charging and discharging the output capacitor and the voltage created from the inductor current ripple through the output capacitor ESR. Selecting an output capacitor with a low ESR reduces the
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SC251
POWER MANAGEMENT Applications Information (Cont.)
output voltage ripple component that is dependent upon this ESR, as can be seen in the following equation: VOUT (ESR) = IL (ripple ) x ESR( COUT ) Capacitors with X7R or X5R ceramic dielectric should be used for their low ESR and superior temperature and voltage characteristics. Y5V capacitors should not be used as their temperature coefficients make them impractical for this application. The following tables lists the manufacturers of recommended capacitor and inductor options. Table 1: Recommended Inductors
Manufacturer/Part # Value H DCR Saturation Current A Tolerance % Dimensions (LxWxH) mm
BI Technologies HM66304R7 Coilcraft D01608C-472ML TDK VLCF4018T- 4R7N1R0-2
4.7
0.072
1.32
20
4.7 x 4.7 x 3.0
4.7
0.09
1.5
20
6.6 x 4.5 x 3.0
4.7
0.101
1.07
30
4.3 x 4.0 x 1.8
Table 2: Recommended Capacitors
Manufacturer/Part # Value F Rated Voltage VDC Temperature Characteristic Case Size
Murata GRM219R 61A475KE34B TDK C1608JF0J475Z Murata GRM219R 60J106K E19B TDK C2012JB0J106K
4.7
6.3
X5R
0603
4.7
6.3
X5R
0603
10
6.3
X5R
0603
10
6.3
X5R
0805
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SC251
POWER MANAGEMENT Applications Information (Cont.)
PCB Layout Considerations Poor layout can degrade the performance of the DCDC converter and can be a contributory factor in EMI problems, ground bounce and resistive voltage losses. Poor regulation and instability can result. A few simple design rules can be implemented to ensure good layout: 1. Place the inductor and filter capacitors as close to the device as possible and use short wide traces between the power components. 2. Route the output voltage feedback and VDAC path away from the inductor and LX node to minimize noise and magnetic interference. 3. Maximize ground metal on component side to improve the return connection and thermal dissipation. Separation between the LX node and GND should be maintained to avoid coupling of switching noise to the ground plane. 4. To further reduce noise interference on sensitive circuit nodes, use a ground plane with several vias connecting to the component side ground.
PGND
VIN CREF VREF GD EN VMODE VDAC
CIN
LX
SC251
LOUT
COUT
VOUT
PGND
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SC251
POWER MANAGEMENT Typical Characteristics
Efficiency vs. Load VOUT=1.8V
100 90 80 70
100 90 80 70
Efficiency vs. Load VOUT=1.2V
Efficiency (%)
Efficiency (%)
60 50 40 30 20 10 0 0.001
VIN=3.6V
VIN=4.2V
VIN=3.6V 60 50 40 30 20 10 0 0.001
VIN=4.2V
0.010
IOUT(A)
0.100
1.000
0.010
IOUT(A)
0.100
1.000
Efficiency vs. Load VOUT=1.5V
100 90 80 70
100 90 80
Efficiency vs. Load VOUT=2.5V
VIN=3.6V 70
VIN=4.2V
Efficiency (%)
Efficiency (%) 0.010 0.100 1.000
60 50 40 30 20 10 0 0.001
VIN=3.6V
VIN=4.2V
60 50 40 30 20 10 0 0.001 0.010 0.100 1.000
IOUT(A)
IOUT(A)
Efficiency vs. Load VOUT=3.4V (Pass-Through)
100 90 80 70
Efficiency (%)
100 90 80
Efficiency vs. VIN VOUT=1.8V
IOUT=300mA
VOUT=3.4V,VIN=4V
70
Efficiency (%)
IOUT=600mA
IOUT=100mA
60 50 40 30 20 10 0 0.001 0.010
60 50 40 30 20 10 0 2.5 3.0 3.5 4.0 Vin(V) 4.5 5.0 5.5
IOUT=10mA
IOUT(A)
0.100
1.000
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SC251
POWER MANAGEMENT Typical Characteristics (Cont.)
Efficiency vs. VOUT
100 90 IOUT=100mA 80 70 IOUT=600mA
VOUT vs. VDAC
4.5 4.0 3.5 3.0 VMODE=VIN VMODE=GND 2.5 2.0 1.5 1.0 0.5 0.0 0.2 Pass-Through
Efficiency (%)
60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 Vout(V) 2.5 3.0 3.5 4.0
VOUT(V)
VIN=4V
0.4
0.6
0.8
VDAC(V)
1.0
1.2
1.4
1.6
VOUT vs. IOUT
1.600 1.595 1.590 1.585 1.580
2.835 2.836
VREF vs. VIN
2.834
VOUT(V)
VREF(V)
1.575 1.570 1.565 1.560 1.555 1.550 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
2.833
2.832
2.831
2.830 2.5
2.7
2.9
3.1
3.3
3.5
3.7
IOUT(A)
VIN=4V
3.9 4.1 VIN (V)
4.3
4.5
4.7
4.9
5.1
5.3
5.5
IREF=5mA
Oscillator Frequency vs. VIN
1000 TJ=25C 975 TJ=50C TJ=0C 950
VREF vs. IREF
2.845
2.840
Oscillator Frequency (kHz)
925
VREF(V)
5
TJ=85C
2.835
900
TJ=-40C
2.830
875
850 2.5
3
3.5
VIN (V)
4
4.5
2.825 0.0001
0.0010 IREF(A)
0.0100
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SC251
POWER MANAGEMENT Typical Characteristics (Cont.)
Oscillator Frequency vs. Temperature
1150
RDSON vs. VIN
0.35
1100
0.3
Switching Frequency (KHz)
1050
PMOS 0.25
R DSON()
1000
NMOS 0.2
950
Bypass FET
900
0.15 25C
850 -40
-20
0
20
60 40 Temperature(C)
80
100
120
140
0.1 2.5
3
3.5 VIN(V)
4
4.5
5
RDSON vs. Temperature
0.40
2
PMOS FET Leakage vs. Temperature
0.35 PMOS 0.30 Bypass FET
1.5
VIN=5V
Leakage (A)
1 VIN=4V VIN=3.5V 0.5 VIN=2.7V
R DSON()
0.25
NMOS
0.20
0
0.15 VIN=4V -25 -10 5 20 35 50 TJ ( C) 65 80 95 110 125
0.10 -40
-0.5 -40
-15
10
TJ (C)
35
60
85
PASS FET Leakage vs. Input Voltage
2
6 5
Dynamic Supply Current vs. VIN
1.5 VIN=5V
4
IQ_SW (mA)
Leakage (A)
1
VIN=4V VIN=3.5V
3
0.5
VIN=2.7V
2
0
1
-0.5 -40
-15
10
TJ (C)
35
60
85
0 2.5
3
3.5
4 VIN (V)
4.5
5
5.5
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SC251
POWER MANAGEMENT Typical Characteristics (Cont.)
Enable Startup
EN 5V/DIV LX 5V/DIV
Load Step Response
VOUT 100mV/DIV
VOUT 2V/DIV ILoad 500mA/DIV ILOAD = 0 - 800mA VIN = 3.6V VDAC = 0.6V
IIN 500mA/DIV
40s/DIV
100s/DIV
VDAC Step Response (Passthrough)
VDAC Step Response (100% duty)
VDAC 1V/DIV
VDAC 1V/DIV
VGD 5V/DIV
VGD 5V/DIV VIN = 4.0V LOAD = 5 MODE = LP VDAC = 0 to 1.4V VIN = 4.0V LOAD = 5 MODE = LP VDAC = 0 to 1.2V
VOUT 2V/DIV
VOUT 2V/DIV
LX 5V/DIV
LX 5V/DIV
100s/DIV
100s/DIV
VDAC Step Response
VMODE Step Response
VDAC 1V/DIV
VMODE 2V/DIV
VGD 5V/DIV VOUT 2V/DIV VIN = 4.0V LOAD = 5 MODE = LP VDAC = 0 to 1.09V
VGD 5V/DIV VIN = 4.0V LOAD = 5 Mode = LP VDAC = 1.07V
VOUT 2V/DIV
LX 5V/DIV
LX 5V/DIV
100s/DIV
100s/DIV
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SC251
POWER MANAGEMENT Typical Characteristics (Cont.)
Passthrough Current Limit Operation
IOUT 1A/DIV VEN 2V/DIV VGD 5V/DIV IL 500mA/DIV VIN = 4.0V LOAD = Short MODE = LP VDAC = 1.07V VOUT 2V/DIV VIN = 4.0V LOAD = 5 Mode = LP VDAC = 0 to 1.07V LX 5V/DIV
Enable Step Response
VOUT 200V/DIV LX 5V/DIV
1ms/DIV
100s/DIV
Output Ripple Waveform
LX 5V/DIV
VOUT 10mV/DIV
IL 100mA/DIV
200ns/DIV
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SC251
POWER MANAGEMENT Outline Drawing - MLP-10 3x3
A E B
DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX
A A1 A2 b C D E e L N aaa bbb .031 .039 .002 .000 (.008) .007 .009 .011 .074 .079 .083 .042 .048 .052 .114 .118 .122 .020 BSC .012 .016 .020 10 .003 .004 0.80 1.00 0.00 0.05 (0.20) 0.18 0.23 0.30 1.87 2.02 2.12 1.06 1.21 1.31 2.90 3.00 3.10 0.50 BSC 0.30 0.40 0.50 10 0.08 0.10
E PIN 1 INDICATOR (LASER MARK)
A aaa C C 1 LxN 2 A1 A2 C
SEATING PLANE
D
N e bxN bbb CAB
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
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SC251
POWER MANAGEMENT Land Pattern - MLP-10 3x3
K
DIM
(C) H G C G H K P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.112) .075 .055 .087 .020 .012 .037 .150 (2.85) 1.90 1.40 2.20 0.50 0.30 0.95 3.80
Z
Y X P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
(c) 2006 Semtech Corp. 19 www.semtech.com

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